FPT Software HCM recruits:
10 Bridge Chip Engineer - Test Chip - works in Japan on LSI array
Job Description
Read the specification document of the specification. Understand the function of the design, separate each function of the design clearly (function extraction).
Based on the functions learned from the specification, write a verification plan.
The content of the verification plan contains:
- functions to be tested,
- resources used for testing tasks, including the number of test takers, the tools used, the estimated time, etc.
- test methods,
- languages, utility libraries used during testing,
- the testbench structure is built to perform testing,
- test cases are used to test each function of the design,
- checkers need to be done to check if the design function is implemented according to specification,
- coverage model to indicate which functions were performed in the design.
Build testbench according to the structure described in the verification plan.
Perform all the test cases described in the verification plan.
Run the simulation using the appropriate tool, check and detect design flaws, update the design, and repeat this work until the verification plan is fully implemented, checking all the functions of the device. Is it sufficient and running properly?
Report preparation and analysis, evaluation report (including reports on functional coverage, code coverage, checker ...).
Skills & Requirements
Mandatory requirements for newly graduated students:
Good programming thinking, proficiency in C / C ++ programming language
Read and write documents in English
Passionate and eager to learn
Mandatory requirements for experienced candidates:
All requirements are for fresh graduates
There is good thinking about the operation of the hardware
Proficient in HVL hardware testing languages such as SystemVerilog, SystemC, VHDL
Experienced in test planning.
Prioritize the following skills and experience:
Knowledge of hardware testing methods
Fluency in simulation tools such as questasim, VCS
Knowledge of industrial bus standards such as ARM, Opencores ...
Experience in using testing utilities such as OVM, UVM, SystemVerilog Assertion ...
20 BrSE (bridging engineer) designed RTL level digital logic
Job Description
· Document the requirements specification: Analyze the input request, describe the request in the form of detailed functional requirements, the relationships between input and output signals in clock cycles.
· Write a logical architecture specification document: Deriving from the requirements specification document, analyzing the functional requirements described in the requirements specification document, designing the logic circuit to implement those requirements according to behavioral or data flow approach. Describe that design in the form of block diagrams, data flow diagrams, algorithm state machines, finite state machines, and detailed time charts.
· Implement the design in Verilog hardware description language, SystemVerilog (synthesized RTL code). Check the quality of hardware description code by linter. Write basic unit tests. Fix errors reported by IC test engineer.
· Write optimal time, area constraints, and options when synthesizing circuits. Synthesis circuit by synthesis program (Synopsys DesignCompiler, Xilinx XST, ...). Check alerts (infer latches, unconnected batteries, bus width mismatches), analyze time reports, and report area circuits.
Skills & Requirements
Mandatory requirements for newly graduated students:
Good programming thinking, proficiency in C / C ++ programming language
Read and write documents in English
Passionate and eager to learn
Mandatory requirements for experienced candidates:
All requirements are mandatory for fresh graduates
Be passionate and never stop learning
Thinking about good hardware
Proficient in any of the hardware description languages (VHDL, Verilog, SystemVerilog, ...)
Experience working with FPGA (FPGA development tools, FPGA Kits) or ASIC.
Prioritize the following skills and experience:
Candidates are newly graduated students who meet one of the mandatory requirements for experienced candidates.
Describe the system with UML charts, time charts, data flow charts, and function block diagrams.
Knowledge of computer architecture and organization.
Knowledge of industrial bus communication standards (ARM, IBM, OpenCores, ...).
Knowledge of design methodology: Logic synthesis, Design-for-test, Static-timing-analysis, Floor planing, Place and routing, Clock tree synthesis, power synthesis.
Remuneration:
Basic salary: Negotiable according to ability and experience (from 23 man or more)
Bonus 1 year 2 times (each time an average of 1 month's salary)
Travel allowance of up to 20,000 yen
Housing allowance: 30,000 yen
Family allowance like allowance for spouse while living in Japan but income is not stable, allowance for small children): 1 thousand yen / person.
Overtime benefits: full payment.
One year salary increase.
Holidays over 130 days: Saturdays, Sundays, holidays prescribed by Japanese law (including compensatory holidays under the Japanese government's regulations), summer holidays, New Year's Day holidays, other holidays according to the company's schedule.
To pay social insurance, health insurance and unemployment insurance under the regulations of the Japanese government.
The regime of sponsoring round-trip air tickets to Vietnam for family visits for employees with working experience of 1 year or more (counting from the date of signing the official labor contract)
Other welfare regimes such as happy money, hospitality, visitation.
Opportunity:
Working directly with customers is the leading IT company in Japan.
Opportunities for parallel and technical capacity development.
The project area is diverse and plentiful, consistent with the capabilities, interests and aspirations of each person.
The project is large-scale so you will quickly improve your technical skills and problem solving skills.
Stable work in Japan or if you want to return to Vietnam, you will be working at FPT Software Vietnam and able to work in important positions ....
Open and democratic working environment, typical of FPT culture.
Many corporate activities for young people (sports, vacation, team building ...)
If you are interested, you can send CV (in English) to Nguyen Thuy Tien's mail: